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  1. #1
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    question regarding calling a 'make' target more than once.

    I'm on a Sun box. I have a makefile that isn't doing what I want. I have the following targets and they should be pretty self-explanatory (I'll add some echo statement for use in a sample below):

    Code:
     
    build: all clean
        @echo building
     
    rebuild: wipe build
        @echo rebuilding
     
    all:  prog1 prog2 prog3
        @echo compiling prog1 prog2 prog3
     
    clean:
        @echo cleaning
        rm *.o
     
    wipe: clean
        @echo wiping
        rm prog1 prog2 prog3
    All the targets work as expected except the rebuild target. My intent was that it would clean out all the prior executables and temporary files, recompile the executables, and then (again) remove the temporary files. The output from above ought to be:

    make -f my.mk rebuild
    cleaning
    wiping
    compiling prog1 prog2 prog3
    cleaning
    building
    rebuilding

    However, the clean target is only being evaluated once. It cleans at the beginning of the make, but then fails to clean at the end. Is there a way to force make to execute the commands in a target every time it is a dependent of another target rather than just once?

    Thanks in advance,
    Darren
    Last edited by Darren; 06-12-2009 at 12:02 AM.

  • #2
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    try:
    Code:
    rebuild: wipe build clean
    best regards

  • #3
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    Unfortunately, that didn't work in my environment. It is still only evaluating the clean target once. I forgot to include the actual output in my original message--I only listed the desired output. The actual output I'm getting is:

    make -f my.mk rebuild
    cleaning
    wiping
    compiling prog1 prog2 prog3
    building
    rebuilding


    Adding another 'clean' as a dependency to 'rebuild' didn't effect this output at all, and the temp files are still there. I am using the make that came with the Sun box (/usr/ccs/bin/make). I do not have the option of obtaining a different version, such as Gnu. I'm stuck with what I've got.

  • #4
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    Quote Originally Posted by Darren View Post
    Unfortunately, that didn't work in my environment. It is still only evaluating the clean target once. I forgot to include the actual output in my original message--I only listed the desired output. The actual output I'm getting is:

    make -f my.mk rebuild
    cleaning
    wiping
    compiling prog1 prog2 prog3
    building
    rebuilding

    Adding another 'clean' as a dependency to 'rebuild' didn't effect this output at all, and the temp files are still there. I am using the make that came with the Sun box (/usr/ccs/bin/make). I do not have the option of obtaining a different version, such as Gnu. I'm stuck with what I've got.
    I'm sorry, I'm not famliar with sun make,
    It's a guess but try to make clean phony and see if it works.
    Code:
    .PHONY: clean
    my suggestion is based on assumtion that are minor difference between make flavor and this link for sun make:
    http://developers.sun.com/solaris/ar...utility.html#5

    see if this help.

    Edit: gnu make have a flag to echo commands and seems that sun make have one too, -n:
    http://developers.sun.com/solaris/ar...utility.html#4

    best regards
    Last edited by oesxyl; 06-12-2009 at 07:49 PM.

  • #5
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    Well... I ended up having to add a second clean target to get the desired behavior. I don't like it... but it's functional. Came out like this:

    Code:
     
    build: all clean
        @echo building
     
    rebuild: wipe build
        @echo rebuilding
     
    all:  prog1 prog2 prog3
        @echo compiling prog1 prog2 prog3
     
    clean clean2:
        @echo cleaning
        rm *.o
     
    wipe: clean2
        @echo wiping
        rm prog1 prog2 prog3
    Result is that it evaluates clean and clean2 separately even though they both execute the same commands.

    Darren


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